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An 8.6 GHz × 2 subharmonic mixer with complementary current-reuse to enable ultra-low-voltage and low-power operation is presented. The RF transconductance stage of the mixer uses inductive source degeneration and the mixing core uses four transistors that are driven by a quadrature LO signal. A Volterra series analysis is carried out to determine the optimal gate biasing of the transconductor circuit to maximize the third-order intercept point (IIP3) performance of the RF stage and of the entire mixer. Experimental results show that the mixer has a conversion gain of 6.0 dB and an IIP3 of - 8.0 dBm. The entire circuit draws 0.6 mW from a 0.6 V supply. The chip was fabricated in a standard 130 nm CMOS process.