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Video Stream Processing on a High Performance Reconfigurable Architecture

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2 Author(s)
Tao Li ; Coll. of Electron. Eng., Xi''An Univ. of Posts & Telecom, Xi''An, China ; Zhentao Liu

A dynamically reconfigurable architecture VSP-DR1 for video processing is proposed in this paper. This architecture is derived from years of engineering video ASICs and is ideally suited to real-time video streaming. The various cells of the architecture are optimized for video post processing. The architecture, along with its video application, can be used in many real-time video applications.

Published in:
Digital Image Computing Techniques and Applications (DICTA), 2011 International Conference on

Date of Conference: 6-8 Dec. 2011

Page(s):
388 - 393
Print ISBN:
978-1-4577-2006-2
INSPEC Accession Number:
12476642
Conference Location :
Noosa, QLD
Digital Object Identifier :
10.1109/DICTA.2011.72
Product Type:
Conference Publications

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