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Automatic Compilation of C Applications for FPGA-Based Hardware Acceleration

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5 Author(s)
Lieu My Chuong ; PixelMetrix Corp., Singapore, Singapore ; Yan Lin Aung ; Siew-Kei Lam ; Srikanthan, T.
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Advancement in design tools is necessary to bridge the widening productivity gap between hardware design and software development in state-of-the-art Field Programmable Gate Arrays (FPGA). We present a design exploration framework that automatically compiles C applications to realize efficient custom co-processor structures for hardware acceleration on the reconfigurable logic. We show that the proposed design exploration framework can automatically generate Register Transfer Level (RTL) codes from C-functions that outperform the commercial Altera C2H RTL generator by about 40% in terms of average area-time product.

Published in:

Parallel Architectures, Algorithms and Programming (PAAP), 2011 Fourth International Symposium on

Date of Conference:

9-11 Dec. 2011