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This paper presents a second generation 3D integrated feature-extracting CMOS image sensor. This 64×96 pixel vision sensor was designed and fabricated using a 0.18 μm 3D FDSOI process. Each pixel implements a photodiode and computation circuits on three individual tiers, which are vertically stacked and connected through the 3D inter-tier vias. The photodiode is sited on the top tier with an optimized photo sensitivity and a high fill factor (~97%). The in-pixel analog memory and a parallel diffuser network allow this image sensor to store the previous frame image and perform a spatially smoothing operation. Hence, the proposed image sensor can deliver an intensity image, either the previous frame or the smoothed image. Using off-chip subtraction, image features including temporal motions and spatial contours can be easily extracted. Moreover, the power consumption for this image sensor is around 0.8mW at 100 fps. The low power consumption and feature extraction capability make this sensor appealing for the sensor network applications.