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Multiplications by simple rational constants often appear in fixed- or floating-point application code, for instance, in the form of division by an integer constant. The hardware implementation of such operations is of practical interest to reconfigurable computing. It is well known that the binary representation of rational constants is eventually periodic. This brief shows how this feature can be exploited to implement multiplication by a rational constant in a number of additions that is logarithmic in the precision. An open-source implementation of these techniques is provided and is shown to be practically relevant for constants with small numerators and denominators, where it provides improvements of 20% to 40% in area with respect to the state of the art. It is also shown that, for such constants, the additional cost for a correctly rounded result is very small and that correct rounding very often comes for free in practice.