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An Effective Correction Methodology for Interference of Stress-Induced Leakage Current in TDDB Evaluation of High- k Dielectrics

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1 Author(s)
Ernest Y. Wu ; Semiconductor Research and Development Center, IBM Microelectronics Division, Essex, VT, USA

A simple and effective correction methodology for interference of stress-induced leakage current (SILC) in time-dependent-dielectric-breakdown (TDDB) evaluation of high-k dielectrics is reported. Unlike the violation of weakest link failure property found in conventional TDDB evaluation with SILC interference, we have demonstrated that time-to-failure distributions obtained with this new methodology restores this universal property. Excellent results in terms of improved time to failure and Weibull slope were obtained, thus providing a realistic TDDB projection. The algorithm of this methodology is easy to implement and can be used in daily TDDB evaluation.

Published in:

IEEE Electron Device Letters  (Volume:33 ,  Issue: 2 )