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Transistor operations in 30-nm-gate-length EJ-MOSFETs

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7 Author(s)
Kawaura, H. ; Fundamental Res. Labs., NEC Corp., Tsukuba, Japan ; Sakamoto, T. ; Baba, T. ; Ochiai, Y.
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Discusses fabrication of electrically variable shallow junction MOSFETs (EJ-MOSFETs) to investigate transistor characteristics in ultra-fine gate MOSFETs. By using electron beam (EB) lithography and an ultra-high resolution resist (Calixarene), we could achieve a gate length of 30 nm for the first time. Since the short-channel effects are effectively suppressed by electrically induced ultra-shallow source/drain regions in the structure, the fabricated device exhibited normal transistor characteristics in the 30-nm-gate-length regime at 300 K.

Published in:

Device Research Conference Digest, 1997. 5th

Date of Conference:

23-25 June 1997

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