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3.6mW D-band divide-by-3 injection-locked frequency dividers in 65nm CMOS

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3 Author(s)
I-Ting Lee ; Graduate Institute of Electronics Engineering & Department of Electrical Engineering National Taiwan University, Taipei, Taiwan, 10617, R.O.C. ; Chiao-Hsing Wang ; Shen-Iuan Liu

Two 3.6mW D-band divide-by-3 injection-locked frequency dividers (ILFDs) are realized in a 65nm CMOS process. The power consumption is 3.6mW for a supply of 1.2V. By using a second-harmonic enhancement technique, a divide-by-3 ILFD achieves a locking range of 130.01~132.4GHz. To the authors' best knowledge, this is the first divide-by-3 CMOS ILFD to work at D band.

Published in:

Solid State Circuits Conference (A-SSCC), 2011 IEEE Asian

Date of Conference:

14-16 Nov. 2011