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A 1.39-V input fast-transient-response digital LDO composed of low-voltage MOS transistors in 40-nm CMOS process

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7 Author(s)
Onouchi, M. ; Renesas Electron. Corp., Tokyo, Japan ; Otsuga, K. ; Igarashi, Y. ; Ikeya, T.
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A fast transient-response digital low-dropout (LDO) voltage regulator comprising only low-voltage MOS transistors was developed. The input voltage can be higher than the withstand voltage of the low-voltage MOS transistors by the proposed withstand-voltage relaxation scheme. The switching frequency of 1 GHz can be achieved using small-dimension low-voltage power-MOS transistors. The LDO occupies only 0.057 mm2 area using 40-nm CMOS technology, and covers a wide range of load currents from 400 μA to 250 mA. The response time is only 0.07 μs.

Published in:

Solid State Circuits Conference (A-SSCC), 2011 IEEE Asian

Date of Conference:

14-16 Nov. 2011

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