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A Low Memory Requirements Execution Flow for the Non-Uniform Grid Projection Super-Resolution Algorithm

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3 Author(s)
Tomasz Szydzik ; Dept. of Electron. Eng. & Control, Univ. of Las Palmas of Gran Canaria, Las Palmas of Gran Canaria, Spain ; Gustavo M. Callico ; Antonio Nunez

In this work we present a novel execution flow for the super-resolution image restoration (SRIR) non-uniform grid projection algorithm - the macroblock-level flow. The novel flow is compared with the reference frame-level flow. The frame-level flow is characterized by the fact that transitions from one step of the algorithm to another occur only after the current step is carried out for all macro blocks (MBs) of the frame being currently processed. The novel flow carries out complete processing of one MB before the processing of another MB starts. The memory requirements of both schemes are evaluated in detail and compared. The study on the achievable memory reduction in total memory requirements was carried out for different values of the algorithm parameters: the MB size, scale factor, search area size and number of reference frames included in the sliding frame window. The results show quantitatively that the parameter that influences storage instantiation the most and has the greatest influence on the total memory size is the number of reference frames in the sliding frame window. The conducted study shows that, for a QCIF frame format, switching from frame-to macroblock-level is feasible and fully validated functionally and that the new execution flow can lead to memory reduction by a factor of 6.8 to 40, depending on the algorithm parameters values. Memory reduction greatly facilitates hardware implementations of the algorithm and this is the main result claimed. But the reduction in memory size comes at the cost of increasing the number of memory accesses and therefore communications traffic. The increase noted in memory accesses it to be quantified in future work as well as the potential impact on power consumption. The reduction in memory size might also make it fit on chip without turning to external memory, thereby reducing power consumption. This trade off in power is yet to be quantified.

Published in:

Multimedia (ISM), 2011 IEEE International Symposium on

Date of Conference:

5-7 Dec. 2011