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Design of new full adder cell using hybrid-CMOS logic style

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5 Author(s)
Zavarei, M.J. ; Dept. of Electr. Eng., Sadjad Inst. for Higher Educ., Mashhad, Iran ; Baghbanmanesh, M.R. ; Kargaran, E. ; Nabovati, Hooman
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In this paper, we propose a novel 1-bit full adder using hybrid-CMOS logic style. The new full adder is based on a novel XOR-XNOR circuit that generates XOR and XNOR full-swing outputs simultaneously and outperforms its best counterpart showing 28% improvement in power-delay product (PDP). Design of proposed full adder is based on improvement in the PDP and it provides full-swing output with good driving capability. Simulations demonstrate that full adder successfully operates in the PDP compared to similar circuits.

Published in:

Electronics, Circuits and Systems (ICECS), 2011 18th IEEE International Conference on

Date of Conference:

11-14 Dec. 2011