By Topic

Design of a 1.2-V 60 GHz transceiver in a 90nm CMOS RF technology

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

5 Author(s)

In this paper the design of a high-data-rate transceiver in the 60 GHz band using a QPSK modulation scheme is presented. The channel bandwidth is 1 GHz in order to achieve gigabit Ethernet wireless transmission at 1km distance. The receiver has 66 db of linear controlled gain with a noise figure of 8 dB. The transmitter is capable of delivering -12 dBm of power at the external power amplifier. Both circuits operate under a 1.2 V power supply.

Published in:

Electronics, Circuits and Systems (ICECS), 2011 18th IEEE International Conference on

Date of Conference:

11-14 Dec. 2011