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Closed-loop formal verification framework with non-determinism, configurable by meta-modelling

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3 Author(s)
Sandeep Patil ; The University of Auckland, Level 2, Science Centre, 38 Princes Street, New Zealand ; Sayantan Bhadra ; Valeriy Vyatkin

Formal verification of embedded control systems using closed-loop plant-controller models is getting increasingly popular. In this paper we propose a new method reducing complexity of model-checking on account of infusing non-determinism into certain parts of the plant model during formal verification process guided by a software tool. Net Condition/Event Systems (NCES) formalism is used for modular design of closed-loop models which are verified by ViVe and SESA model-checkers. Its performance is compared to modelling with finite state verified with SMV and UPPAAL and is proven to be superior.

Published in:

IECON 2011 - 37th Annual Conference on IEEE Industrial Electronics Society

Date of Conference:

7-10 Nov. 2011