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Performance Evaluation of OpenMP Constructs and Kernel Benchmarks on a Loongson-3A Quad-Core SMP System

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4 Author(s)
Qiuming Luo ; Nat. High Performance Comput. Center (NHPCC), Shenzhen Univ., Shenzhen, China ; Chang Kong ; Ye Cai ; Gang Liu

As a competitor and alternative to mainstream general-purpose CPU (Intel/AMD/etc.), Loongson is a family of general-purpose MIPS-compatible CPUs developed at the ICT of CAS in China. The quad-core Loongson 3A is evaluated in this paper. The performance of the basic OpenMP constructs on Loongson-3A quad-core SMP is obtained by applying the EPCC Micro benchmarks. And then the performance of NAS kernel codes is obtained by applying NAS Parallel Benchmarks (NPB). These benchmarking are carried out for three different OpenMP compilers (and the runtime system), which includes GCC, OMPipth (OMPi with pthread library) and OMPi-psth (OMPi with psthread library). The results show that OMPI-pth's performance is the best and OMPi-psth's performance is the worst. Those test results might help to program the OpenMP codes as well as to select the appropriate compiler and its runtime system. And an Intel core i5 quad-core platform is used for comparison purpose, by running NPB, which implies that Loongson 3A's performance is nearly one tenth of i5's. The NPB results can help to defining a Loongson system's scale when replacing an Intel i5 system for a given problem size.

Published in:

Parallel and Distributed Computing, Applications and Technologies (PDCAT), 2011 12th International Conference on

Date of Conference:

20-22 Oct. 2011