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Low power high data rate GHz range receiver in 40nm CMOS technology

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7 Author(s)
Xiaopeng Yu ; Inst. of VLSI Design, Zhejiang Univ., Hangzhou, China ; Zhenghao Lu ; Wei Meng Lim ; Kiat Seng Yeo
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In this paper, a low power high data rate OOK receiver at GHz range is proposed. An injected locked ring oscillator based local oscillator is used for data demodulation. Implemented with a standard 40nm CMOS process, the receiver is able to recover an input signal with 1-4 GHz carrier frequency at the data rate of 50 Mbps while consuming less than 300 μW.

Published in:

Electron Devices and Solid-State Circuits (EDSSC), 2011 International Conference of

Date of Conference:

17-18 Nov. 2011

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