By Topic

Derivation of Automatic Test Set for Detection of Missing Gate Faults in Reversible Circuits

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Kole, D.K. ; Inf. Technol. Dept., Bengal Eng. & Sci. Univ., Shibpur, India ; Rahaman, H. ; Das, D.K. ; Bhattacharya, B.B.

This article presents a novel technique for the generation of test set in a reversible quantum circuit. The algorithms are developed to derive the automatic test set (ATS) for the detection of all partial missing-gate faults, all single missing gate faults and multiple missing gate faults in an (n x n) reversible circuit implemented with k-CNOT gates. Experimental results on some benchmark circuits are also reported.

Published in:

Electronic System Design (ISED), 2011 International Symposium on

Date of Conference:

19-21 Dec. 2011