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Although the reliability of chip-substrate interconnect joint has been well recognized by using leaded or lead-free solder bumps and Cu pillar, the relative displacement induced by package warpage between the bump and bump pad received significantly increasing interest, especially for those devices with low K materials and fine-pitch interconnects as the pitch becomes smaller and the package body size becomes larger in flip chip technology. In order to study the physical relationship between micron-level warpage of the package and nano-level displacement of the solder bumps, 1112-ball flip-chip BGA with and without a heat spreader was measured by using Shadow Moiré technique and Micro Moiré interferometry in this study. Shadow Moiré technique was used to characterize the overall warpage of the package between room temperature and solder ball reflow temperature of 230°C and Micro Moiré interferometry was used at room temperature and 114°C. From the results by Shadow Moiré, a heat spreader could alter the warpage pattern of the package from convex (w/o) to concave (w/o) and the amount of warpage was well-controlled under 16um. Furthermore, the correlations between Shadow Moiré and Micro Moiré were also described in this study. This study developed a useful approach and made direct estimations for the displacement of solder bumps to the possibility that could be contributive to the evaluation of the reliabilities of chip-level interconnects and packaging design.