Real-time Two-Stage SPECK (TSSP) design and implementation for scalable video coding on embedded systems

In this paper, we discuss the design and real-time implementation of a novel wavelet coefficient encoder for Scalable Video Coding (SVC) in a surveillance environment. The novel wavelet coefficient encoder, called Two-Stage SPECK (TSSP), is designed for efficient hardware/software implementations on parallel architectures. As the encoder needs to be integrated into an embedded system, we will elaborate on its implementation on a common VLIW DSP (DM642). Optimization techniques such as SIMD (Single Instruction Multiple Data) and DMA (Direct Memory Access) are applied to maximize parallelism with concurrent calculations and memory transfers. We have realized the execution of the TSSP at 4CIF (CCIR-601) broad- cast resolution and YCbCr 4:2:0 color in 7.884 Mcycles per frame, including memory stalls. This translates to more than 75 full-color encodings per second at a clock rate of 600 MHz.