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Temperature Dependent Test Scheduling for Multi-core System-on-Chip

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3 Author(s)
Chunhua Yao ; Marvell Semicond. Inc., Santa Clara, CA, USA ; Kewal K. Saluja ; Parameswaran Ramanathan

Recent research has shown that some defects are detect resilient under normal or high temperature, therefore tests for those defects must be applied under lower temperature. On the other hand, some tests need to be applied under high temperature to improve the detection sensitivity. Thus temperature dependent testing which applies tests at different temperature ranges is needed. This paper discusses and gives a formulation of the temperature dependent test scheduling problem. In the proposed test scheduling scheme, each test is associated with a lower temperature bound and an upper temperature bound to define the temperature range within which the test must be applied. A list schedule based test scheduling algorithm is proposed to find the earliest starting time of each test. Cooling period is inserted when the core temperature is too high and heating sequence is applied when the core temperature is below the required specified temperature for the core. Simulation studies are performed for ITC'02 SoC benchmarks and test scheduling results are shown.

Published in:

2011 Asian Test Symposium

Date of Conference:

20-23 Nov. 2011