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UNIVERCM: The UNIversal VERsatile computational model for heterogeneous embedded system design

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5 Author(s)
Di Guglielm, L. ; Dept. of Comput. Sci., Univ. of Verona, Verona, Italy ; Fummi, F. ; Pravadelli, G. ; Stefanni, F.
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Modern embedded systems require a tight integration among several heterogeneous components including both digital and analog HW, as well as HW-dependent SW. Moreover, they have a strict interaction with the surrounding physical environment. Traditional approaches for modeling such systems rely either on homogeneous top-down methodologies or on co-simulation frameworks. The former are generally based on a single model of computation. Thus, they do not easily allow to integrate existing components built by using different formalisms. The latter assemble heterogeneous components without providing a rigorous formal support, thus making integration and validation a very hard tasks. This paper proposes UNIVERCM, a formal computational model that allows to represent with a uniform syntax and a precise semantics heterogeneous systems composed of SW, analog and digital HW, as well as the environment they are embedded in. UNIVERCM is not intended to be explicitly used to describe a system, but rather to automatically convert into a uniform representation different descriptions written by using heterogeneous modeling languages.

Published in:

High Level Design Validation and Test Workshop (HLDVT), 2011 IEEE International

Date of Conference:

9-11 Nov. 2011