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A new modeling methodology is proposed to improve performance validation at an early stage in the design cycle of systems dedicated to handheld devices. Hardware models are typically available early in the chipset development cycle, but software, such as multimedia applications, may not be developed until after the ASIC is designed. An alternative source of simulation stimulus must be found so that hardware models can be exercised in the absence of such software. This paper describes three approaches that overcome this dependency and enable the validation of application processor performance at the architecture stage of silicon design: high-level software models, trace-driven characterization, and statistical traffic models. Correlation between actual measurements and simulation outputs demonstrates that these methods provide adequate accuracy for performance validation.
Date of Conference: 9-11 Nov. 2011