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A New Low-Voltage Current Mirror Circuit with Enhanced Bandwidth

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2 Author(s)
Manish Tikyani ; Dept. of Electron. & Commun. Eng., Thapar Univ., Patiala, India ; Rishikesh Pandey

In this paper low-voltage current mirror circuit is proposed. The proposed circuit is developed by using four p-type and five n-type MOSFET's. The proposed circuit is operated at the supply voltage of +1.3 volt. The bandwidth of this circuit has also been enhanced using bandwidth enhancement technique. The proposed circuit has been simulated using Cadence Design Environment in the UMC 0.18 μm CMOS technology. The simulation results have been presented to validate the effectiveness of the proposed circuit.

Published in:

Computational Intelligence and Communication Networks (CICN), 2011 International Conference on

Date of Conference:

7-9 Oct. 2011