Nonvolatile Poly-Si TFT Charge-Trap Flash Memory With Engineered Tunnel Barrier

Tunnel-barrier-engineered thin-film transistor (TFT) memory (TBE-TFT memory) devices on glass substrates were fabricated using low-temperature processes. An amorphous silicon film on the glass substrate was crystallized using excimer laser annealing for system-on-panel applications. The engineered tunnel barrier of VARIOT type (SiO
₂
/Si
₃
N
₄
/SiO
₂
) with a high-
k
HfO
₂
charge-trapping layer and an Al
₂
O
₃
blocking layer was applied to TBE-TFT memory devices in order to enhance the memory performance of TBE-TFT memory devices. As a result, the poly-Si TFT charge-trap Flash memory with an engineered tunnel barrier exhibited excellent memory characteristics, such as large memory window (9.5 V), long retention time, and endurance.