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High-Performance and Scalable System Architecture for the Real-Time Estimation of Generalized Laguerre-Volterra MIMO Model From Neural Population Spiking Activity

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6 Author(s)
Li, W. X. Y. ; Department of Electronic Engineering, City University of Hong Kong, China ; Chan, R. H. M. ; Zhang, W. ; Cheung, R. C. C.
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A hardware-based computational platform is developed to model the generalized Laguerre–Volterra (GLV) multiple-input multiple-output (MIMO) system which is essential in identification of the time-varying neural dynamics underlying spike activities. Time cost for model parameters estimation is greatly reduced by a significant enhancement of 3.1$,times 10^{3}~{rm x}$ in data throughput of the Xilinx XC6VSX475T field programmable gate array (FPGA)-based system compared to a C model running on an Intel i7–860 Quad Core processor. The processing core consists of a first stage containing a vector convolution and MAC (multiply and accumulation) component; a second stage containing a prethreshold potential updating unit with an error approximation function component; and a third stage consisting of a gradient calculation unit. The hardware platform is scalable with the utilization of different number of processing units within each stage. It is also easily extendable into a multi-FPGA structure to further enhance the computational capability. A hardware IP library is proposed for versatile neural models and applications. The implementation of the self-reconfiguring platform and its applications to future research of neural dynamics are explored.

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Emerging and Selected Topics in Circuits and Systems, IEEE Journal on  (Volume:1 ,  Issue: 4 )