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Computing Accurate Performance Bounds for Best Effort Networks-on-Chip

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6 Author(s)
Rahmati, D. ; Dept. of Comput. Eng., Sharif Univ. of Technol., Tehran, Iran ; Murali, S. ; Benini, L. ; Angiolini, F.
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Real-time (RT) communication support is a critical requirement for many complex embedded applications which are currently targeted to Network-on-chip (NoC) platforms. In this paper, we present novel methods to efficiently calculate worst case bandwidth and latency bounds for RT traffic streams on wormhole-switched NoCs with arbitrary topology. The proposed methods apply to best-effort NoC architectures, with no extra hardware dedicated to RT traffic support. By applying our methods to several realistic NoC designs, we show substantial improvements (more than 30 percent in bandwidth and 50 percent in latency, on average) in bound tightness with respect to existing approaches.

Published in:

Computers, IEEE Transactions on  (Volume:62 ,  Issue: 3 )

Date of Publication:

March 2013

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