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Evaluation of process level redundant checkpointing/restart for HPC systems

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3 Author(s)
Egwutuoha, I.P. ; Electr. & Inf. Eng., Univ. of Sydney, Sydney, NSW, Australia ; Levy, D. ; Selic, B.

In recent years, High Performance Computing (HPC) systems have been shifting from expensive massively parallel custom architectures to clusters of commodity personal computers to take advantage of cost and performance benefits. To avoid having to restart an application in case of sudden failure, checkpointing/restart fault tolerance mechanisms are commonly implemented. One drawback to checkpointing/restart is that it creates an overhead which increases the execution time of an application. We present a theoretical analysis of our technique. The results show that the PLR checkpointing/restart can significantly improve the overall reliability of an HPC system.

Published in:
Performance Computing and Communications Conference (IPCCC), 2011 IEEE 30th International

Date of Conference: 17-19 Nov. 2011

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