Skip to Main Content
This paper presents a new technique called supply boosting for designing low voltage, low power mixed signal circuits. An energy efficient supply boosted (SB) successive approximation register (SAR) type analog-to-digital converter (ADC), targeted for biomedical applications is designed in a high-Vth CMOS process. Supply boosting technique improves the input common mode range and minimum operation voltage even when threshold voltages are on the order of the supply voltage. A 10-bit supply boosted SAR ADC was designed in a standard 0.5μm, 5V, 2P3M, CMOS process in which threshold voltages of NMOS and PMOS devices are +0.8V and -0.9V, respectively. Simulation results show that the SB-SAR ADC achieves effective number of bits (ENOB) of 9.5, power consumption of 12μW with sampling rate of 100KS/s on 1.2Volt supply. The proposed ADC achieves a FoM of 166.3fJ/conv-step.