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ParAFEMCap: A Parallel Adaptive Finite-Element Method for 3-D VLSI Interconnect Capacitance Extraction

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6 Author(s)
Genlong Chen ; State Key Lab. of ASIC & System, Microelectronics Department, Fudan University, Shanghai, China ; Hengliang Zhu ; Tao Cui ; Zhiming Chen
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Parasitic extraction is one of the key techniques in very large scale integration design that has been widely used to build the equivalent-circuit model of interconnects. In this paper, a parallel adaptive finite-element method (AFEM) for capacitance extraction of large-scale interconnects (ParAFEMCap) is developed to provide extremely high parallel scalability and numerical accuracy. First, the proposed ParAFEMCap has the potential of high parallel scalability by taking advantages of several advanced parallel techniques, such as parallel adaptive mesh refinement and dynamic load balancing. To the best of the authors' knowledge, this is the first capacitance extraction field solver that is able to run in parallel on hundreds and even thousands of CPU cores. Second, the proposed ParAFEMCap is based on the AFEM, which is proven to converge to the exact solution of the electromagnetic problems in a theoretically quasi-optimal rate. The solution precision of ParAFEMCap can easily be controlled by varying the threshold for the a posteriori error estimator, while the computational time can easily be reduced by increasing the number of CPU cores. Moreover, ParAFEMCap is shown to have the same linear computation complexity as those integral-equation methods, which make it very promising for capacitance extraction of large-scale interconnect problems. Numerical experiments will demonstrate that ParAFEMCap has the advantages of high computational efficiency and accuracy for solving the capacitance extraction problem of large-scale interconnects with complex multilayer structures.

Published in:

IEEE Transactions on Microwave Theory and Techniques  (Volume:60 ,  Issue: 2 )