Cart (Loading....) | Create Account
Close category search window

[Front matter]

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

The purchase and pricing options are temporarily unavailable. Please try again later.

The following topics are dealt with: memory; delay test; manufacturing-aware optimizing power; formal verification; GPU programming; behavioral modeling; timing analysis; parallel embedded software; caches; digital print automation; high-level synthesis; sequential synthesis; NoC design; logic switch; nonvolatile memory; clock network synthesis; EDA; brain-inspired architectures; logic level synthesis; analog circuit sizing; system-level power management; asic and system-level communication synthesis.

Published in:

Computer-Aided Design (ICCAD), 2011 IEEE/ACM International Conference on

Date of Conference:

7-10 Nov. 2011

Need Help?

IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.