Referenced Items are not available for this document.
The first contribution of the proposed approach is to characterize the temporal behavior of a MOBILE threshold logic gate. Subsequently, we derive a simplified metric that depends on the RTD weights and weight independent capacitances. Finally, this metric is used to form an integer linear program that optimizes the performance of the threshold logic gate by appropriate weight assignment.
Published in:
Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2011 IEEE International Symposium on
Date of Conference: 3-5 Oct. 2011
- Page(s):
- 131 - 138
- ISSN :
- 1550-5774
- Print ISBN:
- 978-1-4577-1713-0
- INSPEC Accession Number:
- 12440433
- Conference Location :
- Vancouver, BC
- Digital Object Identifier :
- 10.1109/DFT.2011.13
- Product Type:
- Conference Publications
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