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A high and low light imager (HALLI) developed in a CMOS process is presented. The HALLI utilizes a single column parallel partitioned pixel amplifier with variable topology for the detection of both high and low light levels in the same frame. For high light level detection, a wide dynamic range algorithm is utilized in which multiple resets via real-time feedback are employed. Each pixel in the field of view is independent and can automatically set its exposure time according to its illumination. For low light level detection, two noise reduction techniques are employed, active reset and active column sensor readout technique. Due to the commonalities in the high and low light level readout techniques, and the fact that they occur in staggered instances of time, a single partitioned pixel amplifier which can be configured in various modes of operation is used. The advantages of using a single column parallel partitioned pixel amplifier are simplicity in the analog readout path, reduced chip size, and lower power consumption than using individual dedicated blocks for each technique. The CMOS imager was designed and fabricated in a mixed signal 0.18 μm CMOS technology. System architecture, operation and results are presented.