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Communication-aware task scheduling for multi-core architectures with segmented buses

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5 Author(s)
Yuping Zhang ; Sch. of Comput., Wuhan Univ., Wuhan, China ; Xianbin Xu ; Yuanhua Yang ; Shuibing He
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As the number of cores on a single chip and their performance continue to increase, the communication architecture plays a major role in the area, performance, and energy consumption of the overall system. This paper presents a mesh-like connected multi-core architecture with segmented buses to meet the requirements of high performance and low energy consumption. Based on the proposed architecture, a communication-aware greedy task scheduling is designed to minimize the communication energy consumption among cores while maintaining the same performance as other scheduling algorithms. We evaluate the algorithm performance through a series of experiments with Gaussian Elimination, and the experimental results confirm the effectiveness of the algorithm.

Published in:

Biomedical Engineering and Informatics (BMEI), 2011 4th International Conference on  (Volume:4 )

Date of Conference:

15-17 Oct. 2011