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Hardware architecture design of frame rate up-conversion for high definition videos with global motion estimation and compensation

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2 Author(s)
Kung-Yen Hsu ; Media IC and System Graduate Institute of Electronics Engineering and Department of Electrical Engineering, National Taiwan University BL-421, No.1, Sec. 4, Roosevelt Rd., Taipei 106, Taiwan ; Shao-Yi Chien

Frame rate up-conversion (FRUC) with motion compensated interpolation (MCI) is a key operation for motion blur reduction on liquid crystal displays, and dedicated hardware engine design is necessary. In this paper, a hardware architecture for real-time FRUC applications is designed with global motion estimation and compensation. With the concept of motion estimation in low resolution and motion compensation in high resolution, and redesigning several memory bandwidth-hungry modules, a previous work, global-to-local iterative MCI, is modified for hardware design with similar subjective performance. Next, a high-throughput global motion estimation (GME) engine is designed with subsampling technique and parallel hardware architecture, and global motion compensated interpolation and moving block classifier are both designed by sharing the hardware with GME. Moreover, a motion estimation engine is also designed to support various local motion estimation algorithms in different stages. Implementation results show that the proposed GME engine can achieve much higher specifications with limited hardware cost increase. Furthermore, the proposed FRUC design can generate 60 1920 × 1080 interpolated frames per second with the gate count of 1.3M and on-chip memory size of 99kb.

Published in:

2011 IEEE Workshop on Signal Processing Systems (SiPS)

Date of Conference:

4-7 Oct. 2011