By Topic

Two-path double delay line based bandpass quadrature ΣΔ modulator

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $31
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Nithin Kumar, Y.B. ; Dept. of Electr. & Electron., IIT Kharagpur, Kharagpur, India ; Bonizzoni, E. ; Patra, A. ; Maloberti, F.

A design technique for a double-delay based quadrature ΣΔ modulator is presented. The architecture uses a two-path scheme, which avoids mirror tones in the signal band and locks the intermediate frequency with the clock, thus avoiding the trimming requirement. The two-path architecture and time interleaving lead to an overall power reduction by a factor of 8.

Published in:

Electronics Letters  (Volume:47 ,  Issue: 24 )