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Effects of Guard-Ring Structures on the Performance of Silicon Avalanche Photodetectors Fabricated With Standard CMOS Technology

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3 Author(s)
Myung-Jae Lee, ; Dept. of Electr. & Electron. Eng., Yonsei Univ., Seoul, South Korea ; Rucker, H. ; Woo-Young Choi

We investigate the effects of guard-ring (GR) structures on the performance of silicon avalanche photodetectors (APDs) fabricated with the standard complementary metal-oxide-semiconductor (CMOS) technology. Four types of CMOS-compatible APDs (CMOS-APDs) based on the p+/ n-well junction with different GR structures are fabricated, and their electric-field profiles are simulated and analyzed. Current characteristics, responsivity, avalanche gain, and photodetection bandwidth for CMOS-APDs are measured and compared. It is demonstrated that the GR realized with shallow trench isolation provides the best CMOS-APD performance.

Published in:

Electron Device Letters, IEEE  (Volume:33 ,  Issue: 1 )