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Final experimental results of three-level boost rectifier based on 3SSC with FPGA digital control for UPS applications

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4 Author(s)
da Câmara, R.A. ; Univ. Fed. Rural do Semi-Arido, Mossoró, Brazil ; Praça, P.P. ; Cruz, C.M.T. ; Torrico-Bascope, R.P.

This paper presents the final experimental results obtained from a 3kW lab model developed three-state switching cell (3SSC) single-phase three-level boost rectifier with Power Factor Correction (PFC) using FPGA digital control for UPS applications. Its main features are: reduced conduction losses, weight and volume; simple digital control strategy based on One-Cycle Control (OCC) technique using FPGA; connection between input and output enabling the use of inverter and bypass for UPS application. A simple theoretical analysis and simulation results are also presented.

Published in:

Power Electronics Conference (COBEP), 2011 Brazilian

Date of Conference:

11-15 Sept. 2011