Skip to Main Content
This paper presents the concept and design of exhaustive-parallel search algorithm for Network-on-Chip. The proposed parallel algorithm searches minimal path between source and destination in a forward-wave-propagation manner. The algorithm guarantees setup latency if the setup path exists. A high performance switch is designed to support exhaustive-parallel search algorithm. The NoC fabric is designed for 8×8 mesh architecture and its performance is evaluated.
SOC Conference (SOCC), 2011 IEEE International
Date of Conference: 26-28 Sept. 2011