By Topic

Zero-Sleep-Leakage Flip-Flop Circuit With Conditional-Storing Memristor Retention Latch

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

5 Author(s)
Chul-Moon Jung ; Sch. of Electr. Eng., Kookmin Univ., Seoul, South Korea ; Kwan-Hee Jo ; Eun-Sub Lee ; Huan Minh Vo
more authors

In this paper, two new zero-sleep-leakage flip-flop (F-F) circuits are proposed to make the sleep leakage literally zero. At the sleep-in time, the F-F's data are transferred to memristor retention latch; thus, the F-F can be completely cutoff from the external power supply saving the energy leak during the sleep time. The conditional storing circuit in the F-F (type-2) can reduce switching power by 87% in storing the data than the F-F (type-1). And, the crossover time of the F-F (type-2) is shortened by 97% than the F-F (type-1).

Published in:

Nanotechnology, IEEE Transactions on  (Volume:11 ,  Issue: 2 )