By Topic

Pre-silicon 22/20 nm compact MOSFET models for bulk vs. FD SOI low-power circuit benchmarks

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Bol, D. ; ICTEAM Inst., Univ. Catholique de Louvain, Louvain-la-Neuve, Belgium ; Bernard, S. ; Flandre, D.

The pre-silicon 22/20nm LSTP models we generated are available on-line and can be used for fair bulk vs. FD SOI benchmarks. The proposed modeling methodology unified for bulk and FD SOI can further be used to generate models for LOP process flavor and/or 16nm CMOS node.

Published in:

SOI Conference (SOI), 2011 IEEE International

Date of Conference:

3-6 Oct. 2011