By Topic

Combinational logic synthesis for material implication

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Anupam Chattopadhyay ; MPSoC Architectures, UMIC, RWTH Aachen University, Germany ; Zoltan Rakosi

The smooth scaling of technology over past decades is returning diminished profits as researchers are trying to cope with several challenges posed by CMOS devices. As a result, quest for novel physical media for storage and computing is currently an important research pursuit. Recently a new kind of passive electrical device called memristor is proposed, which can retain its state via the resistance in a non-volatile fashion. It is also experimentally demonstrated to perform material implication, a fundamental logical operation. The capability of a memristive device to do logical operations as well as to retain its state makes it a promising candidate for future technologies. In this paper, we investigate the approximate implementation cost of a multi-level combinational logic while using memristive switches as the target technology. Traditional synthesis algorithms are extended and new heuristics are suggested to reduce the costs significantly.

Published in:

2011 IEEE/IFIP 19th International Conference on VLSI and System-on-Chip

Date of Conference:

3-5 Oct. 2011