By Topic

Towards future VLSI interconnects using aligned carbon nanotubes

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

6 Author(s)
Yang Chai ; Dept. of Electron. & Comput. Eng., Hong Kong Univ. of Sci. & Technol., Hong Kong, China ; Minghui Sun ; Zhiyong Xiao ; Yuan Li
more authors

The copper interconnects cannot keep pace with the IC interconnect requirements as the feature size continues to scale down to nanoscale. Theoretical works predicted that carbon nanotube (CNT) is more superior than copper for future VLSI interconnects in terms of electrical conductivity, thermal management and reliability. Technology breakthroughs are required to bridge the gaps between the theoretical predictions and what is achievable with current CNT technology. In this paper, we shall describe our experimental efforts on the controlled growth of aligned CNTs; the integrations of CNT interconnects with IC technology; and the electrical characterization of the CNT interconnect. We also present the electro-migration test result of CNT-based interconnects to demonstrate the potential of CNT as robust VLSI interconnects. We hope our works provide useful data on the potential of CNT for VLSI interconnect applications.

Published in:

VLSI and System-on-Chip (VLSI-SoC), 2011 IEEE/IFIP 19th International Conference on

Date of Conference:

3-5 Oct. 2011