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Clockless asynchronous delta modulator based ADC for smart dust applications

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3 Author(s)
Manyam, V.N. ; Dept. of Electr. Eng., Linkoping Univ., Linköping, Sweden ; Chhetri, D. ; Wikner, J.J.

In this paper, design of an asynchronous clockless delta modulator based analog-to-digital converter (ADC) is presented. The ADC employs level-crossing sampling technique. The ADC system is in the context of low speed smart dust sensor applications. For smart dust the benefit with continuous-time clockless system is its reduced hardware and lesser quantization noise power in the frequency band of interest. Further, the unbuffered, segmented resistor-string digital-to-analog converter (DAC) used in the ADC, results in component savings compared to previously reported resistor string DAC. High level simulation results are shown for various ADC resolutions. The signal-to-noise and distortion ratio (SNDR) achieved for an 8-bit and 4-bit ADC systems are presented. It has been shown that a 4-bit system with the proposed segmented resistor string DAC architecture utilizes hardware for a 3-bit system and achieves an ENOB of more than five bits.

Published in:

VLSI and System-on-Chip (VLSI-SoC), 2011 IEEE/IFIP 19th International Conference on

Date of Conference:

3-5 Oct. 2011