Hierarchical neural networks method for fault diagnosis of large-scale analog circuits

A novel hierarchical neural networks (HNNs) method for fault diagnosis of large-scale circuits is proposed. The presented techniques using neural networks(NNs) approaches require a large amount of computation for simulating various faulty component possibilities. For large scale circuits, the number of possible faults, and hence the simulations, grow rapidly and become tedious and sometimes even impractical. Some NNs are distributed to the torn sub-blocks according to the proposed torn principles of large scale circuits. And the NNs are trained in batches by different patterns in the light of the presented rules of various patterns when the DC, AC and transient responses of the circuit are available. The method is characterized by decreasing the over-lapped feasible domains of responses of circuits with tolerance and leads to better performance and higher correct classification. The methodology is illustrated by means of diagnosis examples.