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Asynchronous logic application in a power management unit for ultra low power wireless sensor nodes

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7 Author(s)
Kowalczyk, G. ; Dev. Center Graz, Infineon Technol. Austria AG, Graz, Austria ; Dielacher, M. ; Flatscher, M. ; Prainsack, J.
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This work presents the application of asynchronous logic style to control circuits of the on-chip power management unit (PMU) in a wireless sensor node. Because of the inherent property of asynchronous logic - to operate without any synchronous clock signal - it is the first choice circuit class for controllers in a clock-less environment. Due to the nature of the asynchronous logic, as it is to work in sensitivity to asynchronous input-changes without being separated by clock edges, the construction of such an asynchronous finite state machine (AFSM) requires careful synthesis and implementation methodology. The asynchronous circuit is realized by means of thick gate oxide transistors and it is directly connected to the power supply. Hence, no voltage regulator and no bandgap are required for the operation of the low power asynchronous circuit. The power management unit itself is applied in the architecture of an ultra low power sensor node circuit. Such circuits are supplied by a limited battery voltage or by an energy harvester and require low power architectures in order to deliver long operating times, especially during the power-down phase of the full circuit. The transceiver is manufactured in a 130 nm CMOS process and has to operate between -40 and 125°C.

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13-15 Sept. 2011

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