By Topic

New multi-DSP parallel computing architecture for real-time image processing

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $33
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Hu Junhong ; Dept. of Electronics and Information Engineering, Central China Normal Univ., Wuhan 430079, P.R. China; Huazhong Univ. of Science and Technology, Wuhan 430074, P.R. China ; Zhang Tianxu ; Jiang Haoyang

The flexibility of traditional image processing system is limited because those system are designed for specific applications. In this paper, a new TMS320C64x-based multi-DSP parallel computing architecture is presented. It has many promising characteristics such as powerful computing capability, broad 110 bandwidth, topology flexibility, and expansibility. The parallel system performance is evaluated by practical experiment.

Published in:

Journal of Systems Engineering and Electronics  (Volume:17 ,  Issue: 4 )