Close category search window
 

In-pixel implementation of an area-efficient analog-signal-processing for CMOS-3D image sensor

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

5 Author(s)
Hafiane, M.L. ; Inst. fur Tech. Inf. und Mikroelektron., Tech. Univ., Berlin, Germany ; Blachnitz, R. ; Manck, O. ; Dibi, Z.
more authors

The paper presents the design and test of a 32×32 CMOS 3D-image sensor, based-on indirect time-of-flight (ToF) technique with its derived algorithm: MDSI (multiple double short time integration). The design key feature is the implementation, in pixel-level, of analog signal processing; namely: correlated double sampling (CDS) and analog averaging. Which leads to a significant enhancement in term of signal-to-noise ratio (SNR), while keeping reasonable fill-factor and power consumption. The chip has been fabricated using 0.6um standard CMOS process. The overall achieved performances exhibit an interesting trade-off.

Published in:
Semiconductor Conference Dresden (SCD), 2011

Date of Conference: 27-28 Sept. 2011

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2013 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.