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P2Lib: process-portable library and its generation system

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4 Author(s)
H. Onodera ; Dept. of Electron. & Commun., Kyoto Univ., Japan ; A. Hirata ; T. Kitamura ; K. Tamaru

This paper describes a process-portable library and its generation system called P2Lib. From technology parameters which characterize a fabrication process, P2Lib generates a complete set of standard cell libraries for logic synthesis, logic simulation, and layout synthesis. A distinctive feature of P2Lib is the rapid characterization of timing and power dissipation by an analytic-oriented method, as well as the accurate characterization by circuit simulation. A designer can quickly create a library under various operating conditions and process specifications, so that he can examine his design with CAD tools. The quality of generated libraries (layout and timing) are discussed and a design example with P2Lib is presented

Published in:

Custom Integrated Circuits Conference, 1997., Proceedings of the IEEE 1997

Date of Conference:

5-8 May 1997