Referenced Items are not available for this document.
Optimization of a sub-0.5 μm ESD protection circuit using halo implant is described. A p-type halo implant significantly improves the ESD robustness of a high performance I/O circuit as noted by Human Body Model (HBM) test results. The improved ESD performance is directly attributed to the ability of the halo implanted Thick Field Oxide (TFO) device to inhibit the turn-on of the n-channel output buffer during an ESD event. Improved ESD performance is achieved without the use of additional series resistance and with no increase in device area. The results represent the first time transmission-line pulse generator (TLPG) analysis has been used on a fully synthesized I/O circuit to predict wafer level ESD performance
Published in:
Custom Integrated Circuits Conference, 1997., Proceedings of the IEEE 1997
Date of Conference: 5-8 May 1997
- Page(s):
- 35 - 38
- Meeting Date :
- 05 May 1997-08 May 1997
- Print ISBN:
- 0-7803-3669-0
- INSPEC Accession Number:
- 5709261
- Conference Location :
- Santa Clara, CA
- Digital Object Identifier :
- 10.1109/CICC.1997.606580
- Product Type:
- Conference Publications
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