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Whole-chip ESD protection scheme for CMOS mixed-mode IC's in deep-submicron CMOS technology

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4 Author(s)
Ming-Dou Ker ; Comput. & Commun. Res. Lab., Ind. Technol. Res. Inst., Hsinchu, Taiwan ; Chung-Yu Wu, Ph.D. ; Hun-Hsien Chang ; Tain-Shun Wu

A whole-chip ESD protection scheme with the ESD-connection diodes and a substrate-triggering field-oxide device (STFOD) are proposed to protect mixed-mode CMOS IC's against ESD damage. The STFOD is triggered on by the substrate-triggering technique to make an area-efficient VDD-to-VSS ESD clamp circuit. The ESD-connection diodes provide the current discharging paths among the multiple separated power lines to avoid the ESD damage located at the digital-analog interface. This whole-chip ESD protection scheme has been practically verified in an L-bits DAC chip in a 0.6-μm CMOS process with a pin-to-pin ESD robustness of above 4 KV

Published in:

Custom Integrated Circuits Conference, 1997., Proceedings of the IEEE 1997

Date of Conference:

5-8 May 1997

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