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In this contribution, behavioral synthesis tools are used for hardware implementation of a cellular neural network with the ability to accomplish image processing tasks in real time. Behavioral synthesis tools such as the CCC HLS framework can deliver correct-by-construction RTL VHDL implementations of computation-intensive applications such as image processing and cellular neural networks. The tool applies formal techniques to transform behavioral ADA specifications into RTL micro-architectures which then can be easily implemented by commercial RTL synthesizers. Example applications such as, edge-detection, half toning and morphological operations, validate the presented contribution.